Uma ferramenta baseada em inteligência artificial para exploração de espaço de projeto para redes em chip / An artificial intelligence-based tool for exploiting design space for chip networks

Jefferson Igor Duarte Silva, Márcio Eduardo Kreutz, Monica Magalhães Pereira

Abstract


Com o incremento em números de núcleos em sistemas em chip, arquiteturas de barramento tem sofrido com algumas limitações. Os requisitos das aplicações demandam mais largura de banda e baixas latências. Em face a esse cenário, redes em chip emergiram como uma opção para superar essas limitações. Redes em chip são compostas por um conjunto de roteadores e enlaces de comunicação. Nesse trabalho, nós propomos o uso de técnicas de inteligência artificial para otimizar a arquitetura das redes em chip. A ferramenta explora o espaço de projeto em termos de predição de área, latência e potência para diferentes configurações. Os resultados têm demonstrado a validade dessa proposta e a adequação as restrições impostas pelo projetista.

Keywords


Redes em chip, inteligência artificial, sistemas em chip.

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DOI: https://doi.org/10.34117/bjdv7n1-134

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